Category: 

Semiconduct

High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125

High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125

CD74HC112NSRG4 Independent Distributors

DistributorStockPricePurchase
2,475
as of 6/28
BUY
ISO
Inventory Trend
0
6 month average

CD74HC112NSRG4 Inventory Trend

* Individual data points may be artificially higher due to the tracking of zero quantities.